Diseño de un Modulador ΣΔ en tiempo continuo utilizando el transistor de compuerta flotante

Abstract

This work presents the design and development of a continuous-time ΣΔ modulator in differential mode for the analog to digital conversion of low frequency signals. The modulator is designed with circuits that consume low power and low voltage, using floating gate transistors (FGMOS), and their main characteristic is that their threshold voltage is controlled by N input voltages coupled to the floating gate through capacitors. The system is integrated for its microelectronics realization using different blocks, such as Gm-C integrators operating as low-pass filters, a comparator operating as one bit quantizer and differential pairs as digital to analog converters. This leads to count with over-sampling techniques with a high speed processing in real time. Therefore, the design and development take into account process techniques CMOS of 0.5 μm for its performing.